This feels like it ought to be a common problem with a conventional solution, but I'm struggling to find one.
I am designing a board with several JTAG-conforming components. It has a mezzanine with another.
The mezzanine may or may not be fitted.
How can I arrange that JTAG works properly both with the board present and absent?
The obvious, but clunky, solution would be to fit a TDI-TDO link when the board was absent. Perhaps a TDI-TDO tristate buffer with pull-down on nOE, driven high by a presence-sense line from the board?
Obviously, with JTAG I care a great deal about robustness. Is that robust? Are there any complications to consider?
